High-Performance Graphics on CompactPCI® Serial

2011-10-21, Manfred Schmitz

External graphics boards for high performance

A standard PC supports graphics. A modular computer based on the PICMG CompactPCI® Serial specification CPCI-S.0 shall also be able to control displays.


Many – also high-performance – chipsets have a built-in graphics controller today. As a rule, the CPU and graphics controller share the main memory in this architecture. This way, cost-effective and well-fitting solutions can be achieved for low to medium requirements especially in the 2D area. If displays with a very high resolution are to be controlled, the performance both of the CPU and of the graphics unit are limited by the bandwidth of this shared memory. If you want to operate several high-resolution displays at the same time or if you have higher requirements regarding the graphics itself (e.g., 3D rendering), it is advisable to use an external, independent graphics controller with its own video memory.


If you choose an external graphics controller, the data transfer rate of the connection between the chipset and the graphics controller is the critical factor for the performance. For this reason, this connection has promoted modern buses. The development first of the PCI bus, then the AGP bus and finally PCI Express® was pushed on decisively by graphics cards.


Contrary to other serial interconnects such as SATA and USB 3.0 for example, PCI Express® is not limited to a single lane (a differential receive and transmit signal line pair) but combines up to 16 of these lanes in parallel to control the graphics card (PCI Express® x16). As it is relatively frequent that more than one graphics card has to be controlled, all common chipsets and graphics controllers support a mode which splits the PCI Express® x16 link into two PCI x8 interfaces. This splitting halves the maximum burst data rate. This is compensated for, however, by the constant advancement of the transmission frequency at the PCI Express® interface (called Gen1, Gen2, Gen3 etc).


Graphics extensions are one reason for the special CompactPCI® Serial architecture. Two slots are connected to the system slot via PCI Express® x8 interfaces. This way, two peripheral slots of the CompactPCI® Serial system can be equipped with high-performance graphics cards. This works with standard backplanes without additional measures like switched fabrics, i.e. without additional costs and loss of performance.


Otherwise all peripheral slots have identical characteristics, the remaining slots being connected via a PCI Express® x4 interface. Principally, graphics cards can be plugged into every peripheral slot. The performance is not quite as high there, but still sufficient for many applications.


Modern graphics chips (e.g., from ATI) are able to control up to four high-resolution displays simultaneously via DisplayPort®. A CompactPCI® Serial system can accommodate up to eight graphics cards (without bridges), making it possible to control 32 displays with the corresponding software.


This extensibility of graphics functions shows that the CompactPCI® Serial CPCI-S.0 architecture is very well suited for applications which far extend the possibilities of the parallel CompactPCI®. For example, control rooms of power stations, railway control centers, even video walls consisting of more than 32 monitors can now be equipped with CompactPCI® Serial systems.


System slot with integrated graphics for low to medium performance

Figure 1: System slot with integrated graphics for low to medium performance


External graphics boards for high performance

Figure 2: External graphics boards for high performance


Video wall control with CompactPCI® Serial

Figure 3: Video wall control with CompactPCI® Serial




Manfred Schmitz, Technical Director MEN Mikro Elektronik

German version on ElektronikPraxis: Leistungsfähige Grafik auf CompactPCI SerialGerman version on ElektronikPraxis: Leistungsfähige Grafik auf CompactPCI Serial

Other Articles

» The Future is Serial: CompactPCI® Serial (2011-12-23)

» System Slot Boards with the Latest Intel® Architecture for CompactPCI® PlusIO and CompactPCI® Serial (2011-12-09)

» Legacy Interface Concept for CompactPCI® Serial (2011-12-02)

» Ethernet Switch Functionality for CompactPCI® Serial (2011-11-30)

» 6U CompactPCI® Parallel/Serial Hybrid Systems (2011-11-26)

» 6U Backplanes for CompactPCI® Serial (2011-11-23)

» Conductive Cooling with CompactPCI® Serial (2011-11-17)

» Connector Layout and Coding with CompactPCI® Serial (2011-11-02)

» Building Clusters with CompactPCI® Serial (2011-10-15)

» Mixed Doubles: CompactPCI® Serial and CompactPCI® 2.0 (2011-10-13)

» Application-Specific Backplane Architectures with CompactPCI® Serial (2011-09-16)

» Ethernet Extensions for CompactPCI® Serial (2011-09-02)

» CompactPCI® PlusIO and CompactPCI® Serial capture the systems market (2011-08-27)

» CompactPCI® Serial for Safety-Relevant Architectures (2011-08-20)

» CompactPCI® Serial Ethernet Mesh Architecture (2011-08-06)

» CompactPCI® Serial Ethernet Star Architecture (2011-07-23)

» CompactPCI® Serial - Why is it a PICMG Standard? (2011-06-17)

» CompactPCI® Serial Star Topologies, Part 2 (2011-05-12)

» CompactPCI® Serial Star Topologies, Part 1 (2011-03-21)

» CompactPCI® Serial - The Guide Element (2011-03-10)

» Hot-Plug Functionality with CompactPCI® Serial, Part 2 (2011-02-05)

» Hot-Plug Functionality with CompactPCI® Serial, Part 1 (2011-02-03)

» XMC Carrier Board for CompactPCI® Serial (2010-12-23)

» Mezzanine Cards on CompactPCI® Serial (2010-12-22)

» PCI Express® Mini Card Carrier for CompactPCI® Serial (2010-12-21)

» USB Support with CompactPCI® Serial (2010-12-06)

» Physical Addressing with CompactPCI® Serial (2010-11-22)

» Standardized Rear I/O for CompactPCI® Systems Thanks to CompactPCI® PlusIO (2010-11-13)

» Rear I/O with 6U CompactPCI® Serial (2010-11-06)

» P0 Adds Power to CompactPCI® Serial on 6U (2010-10-30)

» CompactPCI® Serial in 6U Format (2010-10-23)

» Ecosystem for CompactPCI® Serial (CPCI-S.0) (2010-10-15)

» First Single-Board Computer according to CompactPCI® Serial Standard (2010-10-14)

» CompactPCI® Serial - a Base Specification (2010-10-08)

» Highly Networked Camera Monitoring System with CompactPCI® PlusIO (2010-10-07)

» Simulation Computer for Training Application with CompactPCI® PlusIO (2010-02-26)

» Recording Image Data from a Mobile Camera with CompactPCI® PlusIO (2010-02-19)

» Mechanics for CompactPCI® Serial: a comparison with familiar architectures such as VPX and MicroTCA (2010-01-29)

» Power Supply for CompactPCI® PlusIO in Accordance with EN 50155 (2010-01-29)

» Harsh Requirements for CompactPCI® PlusIO in Accordance with EN 50155 (2009-12-16)

» CompactPCI® Gets a Plus with an IO and a Serial Companion Specification (2009-12-04)

» Data Management for Mobile Security Application with CompactPCI® PlusIO (2009-12-02)

» Universal Rear I/O Module for CompactPCI® PlusIO (2009-11-19)

» CompactPCI® PlusIO versus MicroTCA (2009-11-13)

» Layout Rules for CompactPCI® PlusIO Boards (2009-11-04)

» User Specific I/O on CompactPCI® PlusIO (2009-10-22)

» Signal integrity on CompactPCI® Serial backplanes (2009-10-15)

» CompactPCI® PlusIO Implementation Rules for Guaranteeing Interoperability (2009-10-08)

» Ethernet Standards for CompactPCI® PlusIO (2009-10-05)

» PCI Express® Configuration Possibilities with CompactPCI® PlusIO (2009-09-23)

» SATA HDD/SSD Shuttle for CompactPCI® Serial Systems (2009-09-10)

» RAID Systems with CompactPCI® Serial (2009-08-24)

» Hybrid backplanes for CompactPCI® and CompactPCI® PlusIO (PICMG 2.30) (2009-07-21)

» Standard Backplanes for CompactPCI® Serial (PICMG CPCI-S.0) (2009-06-19)

» CompactPCI® Serial Rear I/O (2009-06-10)

» CompactPCI® Serial Mesh Architecture (2009-06-03)

» The Star Topology of CompactPCI® Serial und CompactPCI® Plus IO (2009-06-02)

» Standardization of CompactPCI® Serial: what does PICMG bring to the table? (2009-05-14)

» Connector Concept for CompactPCI® Serial (CPCI-S.0) (2009-05-08)

» 3M Ultra Hard Metric (UHM) Connector - The next generation 2mm Hard Metric System (2009-04-27)

» Standard Backplanes for CompactPCI® PlusIO (PICMG 2.30) and CPCI-S.0 (2009-04-02)

» CompactPCI® PlusIO Rear I/O (2009-03-20)

» CompactPCI® Serial and Rear I/O (2009-03-05)

» Migration from CompactPCI® to CompactPCI® Serial (2009-02-20)

» CompactPCI® PlusIO and CompactPCI® Serial System Architecture (2009-02-20)

» CompactPCI® and CompactPCI® Express System Architecture (2009-02-06)

» What is CompactPCI® Serial? (2009-01-14)