Layout Rules for CompactPCI® PlusIO Boards

2009-11-04, Manfred Schmitz

Trace width versus trace space

CompactPCI® PlusIO, PICMG 2.30, is a standard for CompactPCI® system slots, i.e. for CPU boards. The standard defines the state-of-the-art serial interfaces that are used, such as PCI Express®, SATA, USB and Ethernet, and describes how to bring them to the backplane. The standard is limited to the necessary definitions for the CPU board, however. Being no backplane standard, PICMG 2.30 does not set up rules for backplanes.
If a rear I/O adapter is used to access the PICMG 2.30-compliant signals, this is not necessary at all. If you set up a hybrid backplane, for example based on CompactPCI® Express, to control National Instruments cards at low cost, it is the responsibility of the backplane manufacturer to bridge the different standards and to guarantee interoperability.
When defining the rules for the system-slot board in the CompactPCI® Serial standard, the approach taken was to split the electrical tolerances permitted by an interface standard (e.g. PCI Express®) between the CPU board, a possible backplane, and a peripheral board in a "fair" manner. Fair means that the specified values were divided by three.
In order to make implementation simple, to avoid mistakes and to achieve maximum interoperability, the electrical specifications of every single standard were turned into clear PCB layout rules. These rules differ depending on the interface (PCI Express®, SATA, USB, Ethernet). For PCI Express® the following rules apply, for instance:

  • Differential impedance 100 Ohms
  • The distance between differential pairs and other signals shall be more than 0.4 mm
  • The pair-to-pair pitch shall be 0.2 mm minimum
  • Intra-pair skew shall be less than 0.1 mm on the system slot board
  • Trace length shall be less than 125 mm on the system slot board. There shall be a maximum of 2 vias per line on the system slot board

It is these clear implementation guidelines that make a standard reasonable. This guarantees that the modern high-speed interconnects are really usable, and that boards of different manufacturers work together under all circumstances. In this way, CompactPCI® PlusIO PICMG 2.30 guarantees inexpensive usability of these fast connections, while being entirely compatible with the established CompactPCI® standard - a future-proof solution.


Trace width versus trace space


Inter-Pair Skew versus Intra-Pair Skew

Manfred Schmitz, Technical Director MEN Mikro Elektronik

German version on ElektronikPraxis: Layout-Regeln für CompactPCI PlusIO BoardsGerman version on ElektronikPraxis: Layout-Regeln für CompactPCI PlusIO Boards

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