CompactPCI® PlusIO Implementation Rules for Guaranteeing Interoperability

2009-10-08, Manfred Schmitz

CompactPCI® PlusIO – PICMG 2.30 – supports four PCI Express®, SATA and USB 2.0 interfaces as well as two Ethernet interfaces on the backplane. For this, pins are used which have been left free in the basic standard PICMG 2.0 for the user I/O of 32-bit systems. PICMG 2.30 can be used for both 3U and 6U systems if no 64-bit PCI bus implementation is required.
Not every CPU board will use all of the new interfaces – e.g. because of the costs. A typical Intel® Atom™ platform might perhaps only support one Ethernet and one PCIe®. It depends on the implementation whether SATA can be used. Four USB interfaces are possible if required. In order to guarantee maximum interoperability between CPU boards of different manufacturers, the PICMG 2.30 standard defines clearly the sequence in which the interfaces have to be "filled". This makes sure, for example, that the only PCIe® interface of one manufacturer does not collide with a differing assignment of another manufacturer.
The prescribed sequence for Ethernet is ascending: 1, 2, for SATA descending: 4, 3, 2, 1; for USB and PCI Express® ascending: 1, 2, 3, 4. Except for SATA the interfaces are filled incrementing – why not the SATA interfaces?
A CompactPCI® system using PICMG 2.30 can be equipped with up to four of the new serial CompactPCI® Serial slots on the hybrid backplane. These four slots shall even be usable to the maximum if not all interfaces can be supported by a CPU board. When there are four slots it would be unhandy if all interfaces were led to the first slot and none to the last. PCI Express® and USB are implemented concurrently in order to enable the use of PCI Express® MiniCards, for example. One slot will often be needed for a hard disk or an SSD. As only one interface per slot is needed in this case, the interfaces are filled descending.
A system based on an Intel® Atom™ SBC might look like this: Ethernet on the backplane for controlling an additional computer, a video input card controlled via PCI Express® is plugged into the first peripheral slot, the second slot is equipped with a USB-based RS485 extension, slot 3 supports a WiFi interface – also USB – and slot 4 accommodates a SATA hard disk.
This shows that the implementation rules have got two advantages: Maximum compatibility between the cards of different manufacturers and an optimum exploitation of the resources. They are thus in accordance with the CompactPCI® Serial concept: modern technology, robust, low-priced, and future-oriented.



Implementation example for a system based on an SBC with Intel® Atom™ – a CPU which does not support all PICMG 2.30 interfaces.

Manfred Schmitz, Technical Director MEN Mikro Elektronik

German version on ElektronikPraxis: Implementierungsregeln für Interoperabilität bei CompactPCI Plus

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