2009-02-20, Manfred Schmitz
Current PC chipsets support PCI Express® as well as Ethernet, SATA/SAS and USB for controlling peripheral components. Today's CompactPCI® CPU boards are based on these modern chipsets, too.
The CompactPCI® specification PICMG 2.0 permits to lead user I/O to the backplane beside the parallel PCI bus . The manufacturers use these user I/O pins to lead these peripheral signals the modern serial interconnects to the backplane. Unfortunately the pin assignment has not yet been standardized, so that the intercompatibility of the assemblies is lost. Often even boards by one and the same manufacturer cannot be exchanged among each other. What is more, the 2mm-connector was originally not developed for transmitting differential signals with a speed of 2.5 Gb/s or more.
An extension of the CompactPCI® standard PICMG 2.0, PICMG 2.30 PlusIO (still a draft at present) remedies this. This extension of the standard defines the J2 pin assignment and introduces at the same time a new, 100% compatible connector, which is also suited for transmission of high frequencies. For this, only a few additional ground signals are required, so that a high number of interfaces can be led to the backplane.
- 4 x PCI Express® (one lane each)
- 2 x Ethernet 1000BaseT
- 4 x USB 2.0
- 4 x SATA/SAS
The parallel PCI bus is not changed but is limited to a data bus width of 32 bit. PICMG 2.30 can be used for both single and double Eurocards. A board which supports CompactPCI® PlusIO remains 100% compatible to the current standard, so that it can be used without limitations in existing systems. The high speed connector is also 100% compatible.
A CPU assembly which supports PICMG 2.30 can also be used as a system slot in a hybrid system. Such a hybrid system can offer Legacy CompactPCI® slots as well as CompactPCI® Express and CompactPCI® Serial slots.
So a small CompactPCI® system can consist of a CompactPCI® system slot (the CPU board), two CompactPCI® peripheral slots for I/O and field bus and two CompactPCI® Serial peripheral slots for a hard disk RAID with hot plug support.
It is planned to offer hybrid systems like this also as standard systems (catalog products). As no switch or bridge boards are required, they are available for practically the same costs as traditional CompactPCI® systems. They offer the possibility, however, to integrate modern assemblies beside the conventional boards an easy way to migrate to modern technologies.
PICMG 2.30 (Draft) defines the pin assignment of the user I/O for PCI Express®, Ethernet, SATA/SAS and USB and applies both to single and double Eurocards.
The standard hybrid system with 8 slots by the company Schroff® offers space for a CPU, three of the conventional CompactPCI® plug-in boards and four CompactPCI® Serial boards.
Manfred Schmitz, Technical Director MEN Mikro Elektronik
German version on ElektronikPraxis: Migration von CompactPCI nach CompactPCI Plus
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» Legacy Interface Concept for CompactPCI® Serial (2011-12-02)
» Ethernet Switch Functionality for CompactPCI® Serial (2011-11-30)
» 6U CompactPCI® Parallel/Serial Hybrid Systems (2011-11-26)
» 6U Backplanes for CompactPCI® Serial (2011-11-23)
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» Connector Layout and Coding with CompactPCI® Serial (2011-11-02)
» High-Performance Graphics on CompactPCI® Serial (2011-10-21)
» Building Clusters with CompactPCI® Serial (2011-10-15)
» Mixed Doubles: CompactPCI® Serial and CompactPCI® 2.0 (2011-10-13)
» Application-Specific Backplane Architectures with CompactPCI® Serial (2011-09-16)
» Ethernet Extensions for CompactPCI® Serial (2011-09-02)
» CompactPCI® PlusIO and CompactPCI® Serial capture the systems market (2011-08-27)
» CompactPCI® Serial for Safety-Relevant Architectures (2011-08-20)
» CompactPCI® Serial Ethernet Mesh Architecture (2011-08-06)
» CompactPCI® Serial Ethernet Star Architecture (2011-07-23)
» CompactPCI® Serial - Why is it a PICMG Standard? (2011-06-17)
» CompactPCI® Serial Star Topologies, Part 2 (2011-05-12)
» CompactPCI® Serial Star Topologies, Part 1 (2011-03-21)
» CompactPCI® Serial - The Guide Element (2011-03-10)
» Hot-Plug Functionality with CompactPCI® Serial, Part 2 (2011-02-05)
» Hot-Plug Functionality with CompactPCI® Serial, Part 1 (2011-02-03)
» XMC Carrier Board for CompactPCI® Serial (2010-12-23)
» Mezzanine Cards on CompactPCI® Serial (2010-12-22)
» PCI Express® Mini Card Carrier for CompactPCI® Serial (2010-12-21)
» USB Support with CompactPCI® Serial (2010-12-06)
» Physical Addressing with CompactPCI® Serial (2010-11-22)
» Standardized Rear I/O for CompactPCI® Systems Thanks to CompactPCI® PlusIO (2010-11-13)
» Rear I/O with 6U CompactPCI® Serial (2010-11-06)
» P0 Adds Power to CompactPCI® Serial on 6U (2010-10-30)
» CompactPCI® Serial in 6U Format (2010-10-23)
» Ecosystem for CompactPCI® Serial (CPCI-S.0) (2010-10-15)
» First Single-Board Computer according to CompactPCI® Serial Standard (2010-10-14)
» CompactPCI® Serial - a Base Specification (2010-10-08)
» Highly Networked Camera Monitoring System with CompactPCI® PlusIO (2010-10-07)
» Simulation Computer for Training Application with CompactPCI® PlusIO (2010-02-26)
» Recording Image Data from a Mobile Camera with CompactPCI® PlusIO (2010-02-19)
» Power Supply for CompactPCI® PlusIO in Accordance with EN 50155 (2010-01-29)
» Harsh Requirements for CompactPCI® PlusIO in Accordance with EN 50155 (2009-12-16)
» CompactPCI® Gets a Plus with an IO and a Serial Companion Specification (2009-12-04)
» Data Management for Mobile Security Application with CompactPCI® PlusIO (2009-12-02)
» Universal Rear I/O Module for CompactPCI® PlusIO (2009-11-19)
» CompactPCI® PlusIO versus MicroTCA (2009-11-13)
» Layout Rules for CompactPCI® PlusIO Boards (2009-11-04)
» User Specific I/O on CompactPCI® PlusIO (2009-10-22)
» Signal integrity on CompactPCI® Serial backplanes (2009-10-15)
» CompactPCI® PlusIO Implementation Rules for Guaranteeing Interoperability (2009-10-08)
» Ethernet Standards for CompactPCI® PlusIO (2009-10-05)
» PCI Express® Configuration Possibilities with CompactPCI® PlusIO (2009-09-23)
» SATA HDD/SSD Shuttle for CompactPCI® Serial Systems (2009-09-10)
» RAID Systems with CompactPCI® Serial (2009-08-24)
» Hybrid backplanes for CompactPCI® and CompactPCI® PlusIO (PICMG 2.30) (2009-07-21)
» Standard Backplanes for CompactPCI® Serial (PICMG CPCI-S.0) (2009-06-19)
» CompactPCI® Serial Rear I/O (2009-06-10)
» CompactPCI® Serial Mesh Architecture (2009-06-03)
» The Star Topology of CompactPCI® Serial und CompactPCI® Plus IO (2009-06-02)
» Standardization of CompactPCI® Serial: what does PICMG bring to the table? (2009-05-14)
» Connector Concept for CompactPCI® Serial (CPCI-S.0) (2009-05-08)
» 3M Ultra Hard Metric (UHM) Connector - The next generation 2mm Hard Metric System (2009-04-27)
» Standard Backplanes for CompactPCI® PlusIO (PICMG 2.30) and CPCI-S.0 (2009-04-02)
» CompactPCI® PlusIO Rear I/O (2009-03-20)
» CompactPCI® Serial and Rear I/O (2009-03-05)
» CompactPCI® PlusIO and CompactPCI® Serial System Architecture (2009-02-20)
» CompactPCI® and CompactPCI® Express System Architecture (2009-02-06)